The present invention generally relates to switched capacitor circuits, and particularly relates to compensating such circuits with respect to certain process, temperature, and supply variations.
Switched capacitor circuits form the fundamental building blocks for a variety of circuits, such as Delta-Sigma Analog-to-Digital Converters (ΔΣADCs) and discrete time analog filters. However, while their usage varies widely, all such circuits generally include a core switched capacitor architecture based on Operational Transconductance Amplifiers (OTA) that are configured as integrating amplifiers. This circuit's sampling input is coupled to a sampling capacitor through a first switch, and the sampling capacitor is coupled to an amplifier input through a second switch. That same input typically is coupled to the integration amplifier, which forms the feedback loop of the amplifier.
In a sampling phase, the first switch is closed to sample the input voltage, and the second switch is open to isolate the sampling capacitor from the amplifier. Then, in an integration phase, the first switch is opened to isolate the sampling capacitor from the sampling input, and the second switch is closed to connect the sampling capacitor to the amplifier input. That closure causes the amplifier to generate output current in reaction to the step change in its input voltage caused by closure of the second switch. Essentially, this stage involves the transfer of charge from the sampling capacitor to the integration capacitor.
Settling errors arise if the sampling phase ends before the sampling capacitor has fully charged (or discharged) to the level of the signal being sampled, or if the integration phase ends before completion of charge transfer to the integration capacitor. Such settling errors represent a potentially significant source of non-linear distortion in switched capacitor circuits. In practice, settling errors arise almost inevitably because switched capacitor circuits vary from their nominal or designed-for parameters.
Such variations arise for a variety of reasons, including, but not limited to, changes in the circuit fabrication process or changes in the environmental conditions in which the circuits are used. With circuit fabrication process variations, the switched capacitors can be larger or smaller than intended and/or the OTA's peak output current may be more or less than specified by the design. Environmental changes may include temperature and power-supply induced changes in circuit behavior, and changed behavior resulting from the use of switched capacitor clock frequencies different from the designed-for frequencies or the use of sampling-to-integration phase duty cycles that are not at or around 50%.